From bb79a7bc45657dcf4478d84ef33833904f79f89e Mon Sep 17 00:00:00 2001 From: "kaf24@firebug.cl.cam.ac.uk" Date: Tue, 13 Dec 2005 17:08:05 +0100 Subject: [PATCH] Support VMX guest accesses to IA32_TIME_STAMP_COUNTER MSR. Signed-off-by: Haifeng Xue --- xen/arch/x86/vmx.c | 26 ++++++++++++++++++++++++++ xen/arch/x86/vmx_io.c | 6 +++--- xen/include/asm-x86/msr.h | 1 + xen/include/asm-x86/vmx_vpit.h | 1 + 4 files changed, 31 insertions(+), 3 deletions(-) diff --git a/xen/arch/x86/vmx.c b/xen/arch/x86/vmx.c index d0465dbec3..b68356385b 100644 --- a/xen/arch/x86/vmx.c +++ b/xen/arch/x86/vmx.c @@ -1476,6 +1476,15 @@ static inline void vmx_do_msr_read(struct cpu_user_regs *regs) (unsigned long)regs->ecx, (unsigned long)regs->eax, (unsigned long)regs->edx); switch (regs->ecx) { + case MSR_IA32_TIME_STAMP_COUNTER: + { + struct vmx_virpit *vpit; + + rdtscll(msr_content); + vpit = &(v->domain->arch.vmx_platform.vmx_pit); + msr_content += vpit->shift; + break; + } case MSR_IA32_SYSENTER_CS: __vmread(GUEST_SYSENTER_CS, (u32 *)&msr_content); break; @@ -1516,6 +1525,23 @@ static inline void vmx_do_msr_write(struct cpu_user_regs *regs) msr_content = (regs->eax & 0xFFFFFFFF) | ((u64)regs->edx << 32); switch (regs->ecx) { + case MSR_IA32_TIME_STAMP_COUNTER: + { + struct vmx_virpit *vpit; + u64 host_tsc, drift; + + rdtscll(host_tsc); + vpit = &(v->domain->arch.vmx_platform.vmx_pit); + drift = v->arch.arch_vmx.tsc_offset - vpit->shift; + vpit->shift = msr_content - host_tsc; + v->arch.arch_vmx.tsc_offset = vpit->shift + drift; + __vmwrite(TSC_OFFSET, vpit->shift); + +#if defined (__i386__) + __vmwrite(TSC_OFFSET_HIGH, ((vpit->shift)>>32)); +#endif + break; + } case MSR_IA32_SYSENTER_CS: __vmwrite(GUEST_SYSENTER_CS, msr_content); break; diff --git a/xen/arch/x86/vmx_io.c b/xen/arch/x86/vmx_io.c index 75c40e350f..b7689228bf 100644 --- a/xen/arch/x86/vmx_io.c +++ b/xen/arch/x86/vmx_io.c @@ -801,11 +801,11 @@ void set_tsc_shift(struct vcpu *v,struct vmx_virpit *vpit) drift = vpit->period_cycles * vpit->pending_intr_nr; else drift = 0; - drift = v->arch.arch_vmx.tsc_offset - drift; - __vmwrite(TSC_OFFSET, drift); + vpit->shift = v->arch.arch_vmx.tsc_offset - drift; + __vmwrite(TSC_OFFSET, vpit->shift); #if defined (__i386__) - __vmwrite(TSC_OFFSET_HIGH, (drift >> 32)); + __vmwrite(TSC_OFFSET_HIGH, ((vpit->shift)>> 32)); #endif } diff --git a/xen/include/asm-x86/msr.h b/xen/include/asm-x86/msr.h index d98ec40579..f9a07e4791 100644 --- a/xen/include/asm-x86/msr.h +++ b/xen/include/asm-x86/msr.h @@ -88,6 +88,7 @@ static inline void wrmsrl(unsigned int msr, __u64 val) /* Intel defined MSRs. */ #define MSR_IA32_P5_MC_ADDR 0 #define MSR_IA32_P5_MC_TYPE 1 +#define MSR_IA32_TIME_STAMP_COUNTER 0x10 #define MSR_IA32_PLATFORM_ID 0x17 #define MSR_IA32_EBL_CR_POWERON 0x2a diff --git a/xen/include/asm-x86/vmx_vpit.h b/xen/include/asm-x86/vmx_vpit.h index e4e6d2b88c..3fc86a5adf 100644 --- a/xen/include/asm-x86/vmx_vpit.h +++ b/xen/include/asm-x86/vmx_vpit.h @@ -21,6 +21,7 @@ struct vmx_virpit { /* for simulation of counter 0 in mode 2*/ u64 period_cycles; /* pit frequency in cpu cycles */ u64 inject_point; /* the time inject virt intr */ + u64 shift; /* save the value of offset - drift */ s_time_t scheduled; /* scheduled timer interrupt */ struct ac_timer pit_timer; /* periodic timer for mode 2*/ unsigned int channel; /* the pit channel, counter 0~2 */ -- 2.30.2